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NJW4813 - 1 - ver.2012-10-19 dual half bridge driver with boost converter general description package outline features boost converter block output switch voltage 40v max. switching current 1a min. pwm control operating voltage range 2.7 to 5.5v oscillation frequency range 380k to 810khz soft start function 17ms typ. over current protection half bridge driver block internal 2-channnel half bridge each channel operates individually output switch peak current +280 / -250ma typ. operating voltage range 8.0 to 35v switching frequency 300khz max. output shut down control over current protection fault indicator output under voltage lockout built-in thermal shutdown standby function package outline NJW4813se3 : pcsp20-e3 the NJW4813 is a dual half bridge driver with boost converter ic. output voltage boost from li-ion battery and a 5v power supply and can drive a piezo device by two half bridge drivers. the NJW4813 is able to stable startup by soft start function in boost sw.reg.. the dual half bridge driver improves control characteristics from a microcomputer in response to i ndependent signal input in each channel. the input frequency operates to 300khz and in the case of failure, it can output a fault flag. NJW4813se3
NJW4813 - 2 - ver.2012-10-19 pin configuration block diagram vdd_sw under voltage lock out standby on/off oscillator rt in- vref 1v fb radj error amp buf f er pwm gnd stbyb sof t start over current protection thrmal shut dow n sw under voltage lock out over current protection control logic control logic high side gate driver low side gate driver high side gate driver low side gate driver pgnd flt in1 in2 shdnb vdd_hb out1 out2 pin function 1. vdd_sw 2. stbyb 3. shdnb 4. in1 5. in2 6. flt 7. rt 8. gnd 9. pgnd 10.out2 < top view> NJW4813se3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 pad (*1) (*1) the pad is not connected to an ic chip electrically. 11. vdd_hb 12. out1 13. pgnd 14. pgnd 15. sw 16. sw 17. nc 18. radj 19. fb 20. in-
NJW4813 - 3 - ver.2012-10-19 absolute maximum ratings (ta=25c) parameter symbol maximum ratings unit boost converter block supply voltage v dd_sw +6 v sw pin voltage v sw +40 v radj pin voltage v radj +6 (*2) v in- pin voltage v in- -0.3 to +6 (*2) v stbyb pin voltage v stbyb -0.3 to +6 (*2) v half bridge driver block supply voltage v dd_hb +40 v shdnb pin voltage v shdnb -0.3 to +6 (*2) v input voltage v in1 v in2 -0.3 to +6 (*2) v flt pin voltage v flt -0.3 to +6 v power dissipation p d the back pad is mounted. 560 (*3) 980 (*4) the back pad is not mounted. 550 (*3) 850 (*4) mw junction temperature range t j -40 to +150 c operating temperature range t opr -40 to +85 c storage temperature range t stg -40 to +150 c (*2) : when supply voltage is less than +6v, the absolut e maximum voltage is equal to the supply voltage. (*3): mounted on glass epoxy board. (76.2114.3 1.6mm:based on eia/jdec standard, 2layers) (*4): mounted on glass epoxy board. (76.2114.3 1.6mm:based on eia/jdec standard, 4layers), internal cu area: 74.274.2mm this product may be damaged with el ectric static discharge (esd). please handle with care to avoid these damages. recommended operating conditions parameter symbol min. typ. max. unit boost converter block supply voltage v dd_sw 2.7 ? 5.5 v stbyb pin voltage v stbyb 0 ? v dd_sw v timing resistor r t 95 100 146 k ? oscillating frequency f osc 380 700 810 khz half bridge driver block supply voltage v dd_hb 8 ? 35 v output switch dc current i om 0 ? 20 ma shdnb pin voltage v shdnb 0 ? v dd_sw v input voltage v in1 , v in2 0 ? v dd_sw v flt pin voltage v flt 0 ? 5.5 v
NJW4813 - 4 - ver.2012-10-19 electrical characteristics boost converter block (unless otherwise noted, v dd_sw =v stbyb =3.7v, r t =100k ? , ta=25 c) parameter symbol test condi tion min. typ. max. unit under voltage lockout block uvlo release voltage v ruvlo_sw 2.1 2.4 2.7 v uvlo operate voltage v duvlo_sw 2.0 2.2 2.5 v uvlo hysteresis voltage ? v uvlo_sw v ruvlo_sw - v duvlo_sw ? 0.2 ? v soft start block soft start time t ss v b =0.95v 8 17 28 ms oscillator block oscillation frequency f osc 630 700 770 khz oscillation frequency deviation (supply voltage) f dv v dd_sw =3.0 to 5.5v ? 1 ? % oscillation frequency deviation (temperature) f dt ta= -40 to +85 c ? 3 ? % error amplifier block reference voltage v b short in- and fb, measuring in- pin -1.0% 1.00 +1.0% v input bias current i b v b =1.0v -0.1 ? +0.1 a open loop gain a v ? 80 ? db gain bandwidth g b ? 1 ? mhz output source current i om+ v fb =1v, v in- =0.9v 8 16 24 a output sink current i om- v fb =1v, v in- =1.1v 0.9 1.4 4 ma in- pin clamp voltage v clin- v stbyb =0v, v dd_sw =5.5v, i clin- =10 a 4.8 5.2 5.6 v radj pin fet on resistance r on_radj i radj =0.1ma ? 200 280 ? radj pin fet leak current i leak_radj v stbyb =0v, v radj =3.3v ? ? 1 a pwm comparate block maximum duty cycle m ax d uty v in- =0.9v 82 87 92 % output block output on resistance r on_sw i sw =100ma ? 0.6 1.2 ? switching current limit i lmt_sw 1 2 ? a switching leak current i leak_sw v stbyb =0v, v sw =40v ? ? 1 a
NJW4813 - 5 - ver.2012-10-19 electrical characteristics half bridge driver block (unless otherwise noted, v dd_sw =3.7v, v dd_hb =25v, v stbyb =v shdnb =3.7v, r t =100k ? , ta=25 c) parameter symbol test condi tion min. typ. max. unit under voltage lockout block uvlo release voltage v ruvlo_hb 5.6 6.2 6.8 v uvlo operate voltage v duvlo_hb 5.0 5.6 6.2 v uvlo hysteresis voltage ? v uvlo_hb v ruvlo_hb - v duvlo_hb ? 0.6 ? v enable control block high side sw on resistance r dsh i osource =20ma ? 6.0 8.0 ? low side sw on resistance r dsl i osink =20ma ? 7.0 9.0 ? i dcth high-side 230 280 330 ma over current detection current i dctl low-side 200 250 300 ma i rcvh high-side 2.5 5 10 ma over current release current i rcvl low-side 5 10 20 ma i shth v out1 =v out2 =0v 10 25 50 ma output current limit circuit output short current i shtl v out1 =v out2 =v dd_hb 10 25 50 ma output rise time tr v in =0 to 3.3v ? 400 ? ns output fall time tf v in =0 to 3.3v ? 400 ? ns rise dead time d tr v in =0 to 3.3v ? 150 ? ns fall dead time d tf v in =0 to 3.3v ? 150 ? ns rise delay time t d_on v in =0 to 3.3v ? 250 ? ns fall delay time t d_off v in =0 to 3.3v ? 250 ? ns rise ? fall delay time difference t d_on t d_off v in =0 to 3.3v ? 20 ? ns input frequency f in ? ? 300 khz high side sw off leak current i oleakouth v shdnb =0v, v dd_hb =25v v out1 =v out2 =0v ? ? 1 a low side sw off leak current i oleakoutl v shdnb =0v, v dd_hb =25v v out1 =v out2 =25v ? ? 1 a out pin ? vdd pin potential difference v pdov v shdnb =0v, i orh =20ma ? 0.7 1.0 v gnd pin ? out pin potential difference v pdgo v shdnb =0v, i orl =20ma ? 0.7 1.0 v shutdown circuit block shdnb pin high voltage (operating mode) v ihshdnb 1.6 ? v dd_sw v shdnb pin low voltage (shutdown mode) v ilshdnb 0 ? 0.6 v shdnb pin pull down resistance r pdshdnb v shdnb =3.3v 210 300 390 k ? input circuit block in1, in2 pin high voltage v ihin1 , v ihin2 1.6 ? v dd_sw v in1, in2 pin low voltage v ilin1 , v ilin2 0 ? 0.6 v in1, in2 pin input current i iin1 , i iin2 v in =3.3v ? ? 1 a
NJW4813 - 6 - ver.2012-10-19 electrical characteristics general characteristics (unless otherwise noted, v dd_sw =3.7v, v dd_hb =25v, v stbyb =v shdnb =3.7v, r t =100k ? , ta=25 c) parameter symbol test condi tion min. typ. max. unit stbyb pin high voltage (operating mode) v ihstbyb 1.6 ? v dd_sw v stbyb pin low voltage (standby mode) v ilstbyb 0 ? 0.6 v stbyb pin pull down resistance r pdstbyb v stbyb =3.3v 210 300 390 k ? flt pin low level output voltage v lflt i flt =500 a ? 0.25 0.5 v flt pin off leak current i oleakflt v flt =5.5v ? ? 1 a quiescent current (switching regulator block) i qsw r t =100k ? , no load ? 1.9 2.8 ma quiescent current (half bridge driver block) i qhb f in1 = f in2 =10khz antiphase 50% duty cycle ? 0.7 1.0 ma quiescent current (standby) i qstby v dd_hb =0v, v stbyb =v shdnb =0v ? 0.9 1.8 a
NJW4813 - 7 - ver.2012-10-19 typical characteristics (boost converter block) timing resistor vs. oscillation frequency (v dd_sw =3.7v, ta=25c) 400 450 500 550 600 650 700 750 800 850 900 90 100 110 120 130 140 150 timing resistor r t (k ? ) oscillation frequency f osc (khz) oscillation frequency vs. temperature (v dd_sw =3.7v, r t =100k ? ) 400 450 500 550 600 650 700 750 800 850 900 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) oscillation frequency fosc (khz) reference voltage vs. temperature (v dd_sw =3.7v) 0.96 0.97 0.98 0.99 1 1.01 1.02 1.03 1.04 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) reference voltage v b (v) switching current limit vs. temperature (v dd_sw =3.7v) 0 0.5 1 1.5 2 2.5 3 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) switching current limit i lmt_sw (a) output on resistance vs. temperature (v dd_sw =3.7v, i sw =100ma) 0 0.2 0.4 0.6 0.8 1 1.2 -50-25 0 255075100125150 ambient temperature ta (c) output on resistance r on_sw ( ? )
NJW4813 - 8 - ver.2012-10-19 typical characteristics (half bridge driver block) output current limit vs. temperature (high side, v dd_hb =35v) 0 50 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) output current i o (ma) over current detection current: i dcth over current release current: i rcvh output short current: i shth output current limit vs. temperature (low side, v dd_hb =35v) 0 50 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) output current i o (ma) over current detection current: i dctl over current release current: i rcvl output short current: i shtl output current limit characteristics (high side, v dd_hb =35v, ta=25c) 0 50 100 150 200 250 300 350 0 10203040 vdd_hb pin - out pin voltage (v) output current i o (ma) over current detection current: i dcth output short current: i shth over current release current: i rcvh output current limit characteristics (low side, v dd_hb =35v, ta=25c) 0 50 100 150 200 250 300 350 0 10203040 out pin - gnd pin voltage (v) output current i o (ma) over current detection current: i dctl over current release current: i rcvl output short current: i shtl
NJW4813 - 9 - ver.2012-10-19 typical characteristics (half bridge driver block) output rise time vs. temperature (v dd_hb =25v, v in =0 to 3.3v) 0 100 200 300 400 500 600 700 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) output rise time tr (ns) output fall time vs. temperature (v dd_hb =25v, v in =0 to 3.3v) 0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) output fall time tf (ns) high side sw on resistance vs. temperature (v dd_hb =25v, i osource =20ma) 0 1 2 3 4 5 6 7 8 9 10 -50-25 0 255075100125150 ambient temperature ta (c) high side sw on resistance r dsh ( ? ) low side sw on resistance vs. temperature (v dd_hb =25v, i osink =20ma) 0 1 2 3 4 5 6 7 8 9 10 -50-25 0 255075100125150 ambient temperature ta (c) low side sw on resistance r dsl ( ? )
NJW4813 - 10 - ver.2012-10-19 typical characteristics (general characteristics) standby current vs. temperature (v dd_sw =3.7v, v dd_hb =0v, v stbyb =v shdnb =0v) 0 1 2 3 4 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) standby current i qstby ( a) quiescent current vs. temperature (v dd_sw =3.7v, r t =100k ? , no load) 0 0.5 1 1.5 2 2.5 3 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) quiescent current i qsw (ma) switching regulator block quiescent current vs. supply voltage (r t =100k ? , no load, ta=25c) 0 0.5 1 1.5 2 2.5 3 23456 supply voltage v dd_sw (v) quiescent current i qsw (ma) switching regulator block quiescent current vs. supply voltage (v dd_sw =3.7v, f in1 =f in2 =10khz, ta=25c) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 10203040 supply voltage v dd_sw (v) quiescent current i qsw (ma) half bridge driver block quiescent current vs. temperature (v dd_sw =3.7v, v dd_hb =25v, f in1 =f in2 =10khz) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -50 -25 0 25 50 75 100 125 150 ambient temperature ta (c) quiescent current i qhb (ma) half bridge driver block quiecent current vs. input frequency (v dd_sw =3.7v, v dd_hb =25v, ta=25c) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 50 100 150 200 250 300 input frequency f in (khz) quiecent current i qhb (ma) half bridge driver block
NJW4813 - 11 - ver.2012-10-19 switching regulator block pin operation table input output stbyb vdd_sw flt feed back switch power mos fet mode l ? hi-z off off stand-by h < v duvlo_sw l off off uvlo h v ruvlo_sw hi-z on on active input output tj i sw flt feed back switch power mos fet mode >165 c ? l off off tsd (*4) ? i lmtsw l off off ocp (*5) (*4) after the tsd function operates, it returns by tj < 125 c. (*5) power mosfet is controlled by a pulse-by-pulse after an ocp function. switching regulator block pin operation table input output in1 in2 out1 out2 l l l l l h l h h l h l h h h h input output mode in1, in2 stbyb shdnb vdd_hb flt out1 out2 sw.reg. half bridge driver l or h l l ? hi-z hi-z hi-z stand-by l or h l h ? hi-z hi-z hi-z stand-by l or h h l < v duvlo_hb l hi-z hi-z active uvlo l or h h l v ruvlo_hb hi-z hi-z hi-z active shutdown l or h h h < v duvlo_hb l hi-z hi-z active uvlo l or h h h v ruvlo_hb hi-z l or h l or h active input output tj i out1 i out2 flt out1 out2 mode >165 c ? ? l hi-z hi-z tsd (*4) ? i dcth1 , i dctl1 ? hi-z i shth1 , i shtl1 l or h cc (*6) ? ? i dcth2 , i dctl2 hi-z l or h i shth2 , i shtl2 cc (*6) (*6) after cc(constant current) function, an output is controlled by constant current.
NJW4813 - 12 - ver.2012-10-19 timing chart fig. 1. output rise/fall time, rise/fall delay time (a) low side power mosfet (b) high side power mosfet fig. 2. output current limit circuit power dissipation vs. ambient temperature 0 200 400 600 800 1000 0 255075100 ambient temperature ta ( o c) power dissipation p d (mw) pcsp20-e3 package power dissipation vs. ambient temperature (the back pad is mounted., tj= ~150 o c) at on 4 layer pc board at on 2 layer pc board 0 200 400 600 800 1000 0 255075100 ambient temperature ta ( o c) power dissipation p d (mw) pcsp20-e3 package power dissipation vs. ambient temperature (the back pad is not mounted., tj= ~150 o c) at on 2 layer pc board at on 4 layer pc board i shtl v out1 , v out2 i dsl v dd_hb i dctl i rcvl i dsh v out1 , v out2 v dd_hb i dcth i shth i rcvh 10 % 10 % 90 % 90 % 10 % t d_on t d_off t r t f in1 in2 out1 out2 90 %
NJW4813 - 13 - ver.2012-10-19 application example sbd in2 fb v in =3.7v gnd r1 10k ? NJW4813 shutdow n (half-bridge driver) sw pgn d in- r nf 2k ? out1 out2 vdd_hb ra dj pgnd flt in2 fa ult in1 in1 shdnb stbyb stand-by vdd_sw r pull 100k ? pu ll- up c out 10 f v out =24.53v rt c nf 10nf r2 240k ? c1 10nf l 6.8 h r t 100k ? c in 10 f c p_hb 0.1 f c p_sw 0.1 f internal sw r on_ra dj = 200 ? typ. [] v . v k k v r r r v b radj _ on out 53 24 1 200 10 240 1 1 2 1 = ? ? ? ? ? ? ? + ? ? + = ? ? ? ? ? ? ? ? + + =
NJW4813 - 14 - ver.2012-10-19 memo [caution] the specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. the application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.

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